View LT146809_4913360.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

FEATURES
n n n n n n n n n n n n n n
LT1468 90MHz, 22V/s 16-Bit Accurate Operational Amplifier DESCRIPTION
The LT(R)1468 is a precision high speed operational amplifier with 16-bit accuracy and 900ns settling to 150V for 10V signals. This unique blend of precision and AC performance makes the LT1468 the optimum choice for high accuracy applications such as DAC current-to-voltage conversion and ADC buffers. The initial accuracy and drift characteristics of the input offset voltage and inverting input bias current are tailored for inverting applications. The 90MHz gain bandwidth ensures high open-loop gain at frequency for reducing distortion. In noninverting applications such as an ADC buffer, the low distortion and DC accuracy allow full 16-bit AC and DC performance. The 22V/s slew rate of the LT1468 improves large-signal performance in applications such as active filters and instrumentation amplifiers compared to other precision op amps. The LT1468 is manufactured on a complementary bipolar process. It is available in a space saving 3mm x 3mm leadless package, as well as small outline and DIP packages.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
90MHz Gain Bandwidth, f = 100kHz 22V/s Slew Rate Settling Time: 900ns (AV = -1, 150V, 10V Step) Low Distortion, - 96.5dB for 100kHz, 10VP-P Maximum Input Offset Voltage: 75V Maximum Input Offset Voltage Drift: 2V/C Maximum (-) Input Bias Current: 10nA Minimum DC Gain: 1000V/mV Minimum Output Swing into 2k: 12.8V Unity Gain Stable Input Noise Voltage: 5nV/Hz Input Noise Current: 0.6pA/Hz Total Input Noise Optimized for 1k < RS < 20k Specified at 5V and 15V
APPLICATIONS
n n n n n n
16-Bit DAC Current-to-Voltage Converter Precision Instrumentation ADC Buffer Low Distortion Active Filters High Accuracy Data Acquisition Systems Photodiode Amplifiers
TYPICAL APPLICATION
Total Harmonic Distortion vs Frequency 16-Bit DAC I-to-V Converter
TOTAL HARMONIC DISTORTION (dB) -80 VS = 15V AV = 2 RL = 2k VOUT = 10VP-P
-90
20pF DAC INPUTS 16 6k
-
LT1468
-100
2k VOUT 50pF
LTC(R)1597
-110
+
OPTIONAL NOISE FILTER OFFSET: VOS + IB (6k) < 1LSB SETTLING TIME TO 150V = 1.7s SETTLING LIMITED BY 6k AND 20pF TO COMPENSATE DAC OUTPUT CAPACITANCE
1468 TA01
-120
-130 100
1k 10k FREQUENCY (Hz)
100k
1468 TA02
1468fb
1
LT1468 ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ to V -).................................36V Maximum Input Current (Note 2) ...........................10mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range ................. -40C to 85C
Specified Temperature Range (Note 4) .... -40C to 85C Junction Temperature ........................................... 150C Storage Temperature Range................... -65C to 150C Lead Temperature (Soldering, 10 sec) .................. 300C
PIN CONFIGURATION
TOP VIEW NULL 1 -IN 2 +IN 3 V
-
TOP VIEW 8 DNC* V+ OUT NULL
7 6 5
V+ OUT NULL
-IN 2 +IN 3 V- 4 N8 PACKAGE 8-LEAD PDIP
4
DD PACKAGE 8-LEAD (3mm x 3mm) PLASTIC DFN TJMAX = 150C, JA = 43C/W EXPOSED PAD IS INTERNALLY CONNECTED TO V-
*DO NOT CONNECT TJMAX = 150C, JA = 130C/W (N8) TJMAX = 150C, JA = 190C/W (S8)
ORDER INFORMATION
LEAD FREE FINISH LT1468CN8#PBF LT1468IN8#PBF LT1468CS8#PBF LT1468IS8#PBF LT1468ACDD#PBF LT1468AIDD#PBF LT1468CDD#PBF LT1468IDD#PBF LEAD BASED FINISH LT1468CN8 LT1468IN8 LT1468CS8 LT1468IS8 TAPE AND REEL NA NA LT1468CS8#TRPBF LT1468IS8#TRPBF LT1468ACDD#TRPBF LT1468AIDD#TRPBF LT1468CDD#TRPBF LT1468IDD#TRPBF TAPE AND REEL NA NA LT1468CS8#TR LT1468IS8#TR PART MARKING* LT1468CN8 LT1468IN8 1468 1468I LDJX LDJX LDJX LDJX PART MARKING LT1468CN8 LT1468IN8 1468 1468I PACKAGE DESCRIPTION 8-Lead PDIP 8-Lead PDIP 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN PACKAGE DESCRIPTION 8-Lead PDIP 8-Lead PDIP 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline SPECIFIED TEMPERATURE RANGE 0C to 70C -40C to 85C 0C to 70C -40C to 85C 0C to 70C -40C to 85C 0C to 70C -40C to 85C SPECIFIED TEMPERATURE RANGE 0C to 70C -40C to 85C 0C to 70C -40C to 85C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2
+ -
NULL 1
8
DNC*
7 6 5
+ -
S8 PACKAGE 8-LEAD PLASTIC SO
1468fb
LT1468 ELECTRICAL CHARACTERISTICS
SYMBOL VOS PARAMETER Input Offset Voltage N8, S8 LT1468A, DD Package LT1468, DD Package IOS IB- IB
+
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCM = 0V unless otherwise noted.
CONDITIONS VSUPPLY 15V 5V 15V 5V 15V 5V 5V to 15V 5V to 15V 5V to 15V 0.1Hz to 10Hz f = 10kHz f = 10kHz VCM = 12.5V Differential 5V to 15V 5V to 15V 5V to 15V 15V 15V 15V 15V 5V 15V 5V VCM = 12.5V VCM = 2.5V VS = 4.5V to 15V VOUT = 12.5V, RL = 10k VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 10k VOUT = 2.5V, RL = 2k RL = 10k RL = 2k RL = 10k RL = 2k VOUT = 12.5V VOUT = 2.5V VOUT = 0V, VIN = 0.2V AV = -1, RL = 2k (Note 5) 10V Peak, (Note 6) 3V Peak, (Note 6) f = 100kHz, RL = 2k AV = 2, VO = 10VP-P, f = 1kHz AV = 2, VO = 10VP-P, f = 100kHz AV = 1, 10% to 90%, 0.1V AV = 1, 0.1V AV = 1, 50% VIN to 50% VOUT, 0.1V 15V 15V 5V 5V 15V 15V 5V 5V 15V 5V 15V 15V 5V 15V 5V 15V 5V 15V 15V 15V 5V 15V 5V 15V 5V 60 55 15V 5V 96 96 100 1000 500 1000 500 13.0 12.8 3.0 2.8 15 15 25 15 11 12.5 2.5 100 50 MIN TYP 30 50 30 50 100 150 13 3 -10 0.3 5 0.6 240 150 4 13.5 3.5 -14.3 -4.3 110 112 112 9000 5000 6000 3000 13.6 13.5 3.6 3.5 22 22 40 22 17 350 900 90 88 0.00007 0.0015 11 12 30 35 9 10 -12.5 -2.5 MAX 75 175 75 175 200 300 50 10 40 UNITS V V V V V V nA nA nA VP-P nV/Hz pA/Hz M k pF V V V V dB dB dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/s V/s kHz kHz MHz MHz % % ns ns % % ns ns
Input Offset Current Inverting Input Bias Current Noninverting Input Bias Current Input Noise Voltage Input Noise Voltage Input Noise Voltage Input Resistance Input Capacitance Input Voltage Range + Input Voltage Range -
en in RIN CIN
CMRR PSRR AVOL
Common Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain
VOUT
Output Swing
IOUT ISC SR
Output Current Short-Circuit Current Slew Rate Full-Power Bandwidth
GBW THD tr, tf
Gain Bandwidth Total Harmonic Distortion Rise Time, Fall Time Overshoot Propagation Delay
1468fb
3
LT1468 ELECTRICAL CHARACTERISTICS
SYMBOL ts PARAMETER Settling Time
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCM = 0V unless otherwise noted.
CONDITIONS 10V Step, 0.01%, AV = -1 10V Step, 150V, AV = -1 5V Step, 0.01%, AV = -1 AV = 1, f = 100kHz VSUPPLY 15V 15V 5V 15V 15V 5V MIN TYP 760 900 770 0.02 3.9 3.6 5.2 5.0 MAX UNITS ns ns ns mA mA
RO IS
Output Resistance Supply Current
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. 0C TA 70C, VCM = 0V unless otherwise noted.
SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS N8, S8 LT1468A, DD Package LT1468, DD Package Input VOS Drift IOS IB- IB
+
VSUPPLY 15V 5V 15V 5V 15V 5V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V

MIN
TYP
MAX 150 250 150 250 300 400
UNITS V V V V V V V/C nA pA/C nA pA/C nA dB dB dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/s V/s MHz MHz
(Note 7)
0.7 60
2.0 65 15
Input Offset Current Input Offset Current Drift Inverting Input Bias Current Negative Input Current Drift Noninverting Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain VCM = 12.5V VCM = 2.5V VS = 4.5V to 15V VOUT = 12.5V, RL = 10k VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 10k VOUT = 2.5V, RL = 2k RL = 10k RL = 2k RL = 10k RL = 2k VOUT = 12.5V VOUT = 2.5V VOUT = 0V, VIN = 0.2V AV = -1, RL = 2k (Note 5) f = 100kHz, RL = 2k
40 50 94 94 98 500 250 500 250 12.9 12.7 2.9 2.7 12.5 12.5 17 13 9 55 50 6.5 6.3
CMRR PSRR AVOL
15V 5V 15V 15V 5V 5V 15V 15V 5V 5V 15V 5V 15V 15V 5V 15V 5V 15V 5V
VOUT
Output Swing
IOUT ISC SR GBW IS
Output Current Short-Circuit Current Slew Rate Gain Bandwidth Supply Current
mA mA
1468fb
4
LT1468 ELECTRICAL CHARACTERISTICS
SYMBOL VOS PARAMETER Input Offset Voltage N8, S8 LT1468A, DD Package LT1468, DD Package Input VOS Drift IOS IB- IB
+
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. -40C TA 85C, VCM = 0V unless otherwise noted.
CONDITIONS VSUPPLY 15V 5V 15V 5V 15V 5V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V VCM = 12.5V VCM = 2.5V VS = 4.5V to 15V VOUT = 12V, RL = 10k VOUT = 10V, RL = 2k VOUT = 2.5V, RL = 10k VOUT = 2.5V, RL = 2k RL = 10k RL = 2k RL = 10k RL = 2k VOUT = 12.5V VOUT = 2.5V VOUT = 0V, VIN = 0.2V AV = -1, RL = 2k (Note 5) f = 100kHz, RL = 2k 15V 15V 5V 5V 15V 15V 5V 5V 15V 5V 15V 15V 5V 15V 5V 15V 5V 15V 5V

MIN
TYP
MAX 230 330 230 330 400 500
UNITS V V V V V V V/C nA pA/C nA pA/C nA dB dB dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/s V/s MHz MHz
(Note 7)
0.7 120
2.5 80 30
Input Offset Current Input Offset Current Drift Inverting Input Bias Current Negative Input Current Drift Noninverting Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain
80 60 92 92 96 300 150 300 150 12.8 12.6 2.8 2.6 7 7 12 9 6 45 40 7.0 6.8
CMRR PSRR AVOL
VOUT
Output Swing
IOUT ISC SR GBW IS
Output Current Short-Circuit Current Slew Rate Gain Bandwidth Supply Current
mA mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by back-to-back diodes and two 100 series resistors. If the differential input voltage exceeds 0.7V, the input current should be limited to 10mA. Input voltages outside the supplies will be clamped by ESD protection devices and input currents should also be limited to 10mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely.
Note 4: The LT1468C is guaranteed to meet specified performance from 0C to 70C and is designed, characterized and expected to meet these extended temperature limits, but is not tested at - 40C and at 85C. The LT1468I is guaranteed to meet the extended temperature limits. Note 5: Slew rate is measured between 8V on the output with 12V input for 15V supplies and 2V on the output with 3V input for 5V supplies. Note 6: Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/2VP Note 7: This parameter is not 100% tested.
1468fb
5
LT1468 TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage and Temperature
7 6 COMMON MODE RANGE (V) SUPPLY CURRENT (mA) 125C 5 4 25C 3 -55C 2 1 0 5 10 15 SUPPLY VOLTAGE (V) 20
1468 G01
Input Common Mode Range vs Supply Voltage
V+ -0.5 -1.0 -1.5 -2.0 TA = 25C VOS < 100V INPUT BIAS CURRENT (nA) 80 60 40 20 0 -20 -40 -60 0 3 9 12 6 SUPPLY VOLTAGE (V) 15 18
1468 G02
Input Bias Current vs Input Common Mode Voltage
VS = 15V TA = 25C
IB- IB+
2.0 1.5 1.0 0.5 V-
-80 -15
-10 -5 5 10 0 INPUT COMMON MODE VOLTAGE (V)
15
1468 G03
Input Bias Current vs Temperature
30 VS = 15V INPUT VOLTAGE NOISE (nV/Hz) 20 INPUT BIAS CURRENT (nA) 10 0 -10 -20 -30 -40 -50 -25 IB+ IB- 1000
Input Noise Spectral Density
10 VS = 15V TA = 25C AV = 101 RS = 100k FOR in 1 INPUT CURRENT NOISE (pA/Hz)
0.1Hz to 10Hz Voltage Noise
VS = 15V
100
in
en 10 0.1
1 50 25 75 0 TEMPERATURE (C) 100 125 1 10 100 1k FREQUENCY (Hz) 10k
0.01 100k
1468 G05
VOLTAGE NOISE (100nV/DIV)
TIME (1s/DIV)
1468 G06
1468 G04
Warm-Up Drift vs Time
5 0 OFFSET VOLTAGE DRIFT (V) OPEN-LOOP GAIN (dB) -5 -10 -15 -20 -25 -30 -35 -40 0 20 40 60 80 100 120 TIME AFTER POWER UP (s) 140
1468 G07
Open-Loop Gain vs Resistive Load
140 TA = 25C VS = 15V OPEN-LOOP GAIN (dB) VS = 5V 160 150 135 130 125 120 115 110 10 100 1k LOAD RESISTANCE () 10k
1468 G08
Open-Loop Gain vs Temperature
RL = 2k VS = 15V 140 130 VS = 5V 120 110 100 90 -50 -25
N8 5V S0-8 5V
N8 15V
S0-8 15V
50 25 75 0 TEMPERATURE (C)
100
125
1468 G09
1468fb
6
LT1468 TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Swing vs Supply Voltage
V+ -1 OUTPUT VOLTAGE SWING (V) -2 -3 -4 4 3 2 1 V
-
-1.0 OUTPUT VOLTAGE SWING (V) -1.5 -2.0 -2.5
OUTPUT SHORT-CIRCUIT CURRENT (mA)
RL = 2k RL = 10k
V+ -0.5
Output Voltage Swing vs Load Current
VS = 15V 60 25C -40C 85C 55 50 45 40 35 30 25 20 15
Output Short-Circuit Current vs Temperature
VS = 15V VIN = 0.2V SOURCE SINK
2.5 2.0 1.5 1.0 40C 25C
RL = 2k TA = 25C 0 RL = 10k 5 10 15 SUPPLY VOLTAGE (V) 20
1468 G10
85C
V- 0.5 -20 -15 -10 -5 0 10 5 OUTPUT CURRENT (mA)
15
20
10 -50
-25
50 25 0 75 TEMPERATURE (C)
100
125
1468 G11
1468 G12
Settling Time to 0.01% vs Output Step, VS = 15V
10 8 6 OUTPUT STEP (V) 4 2 0 -2 -4 -6 -8 -10 0 200 AV = 1 AV = -1 VS = 15V RL = 1k 5 AV = -1 AV = 1 OUTPUT STEP (V) 4 3 2 1 0 -1 -2 -3 -4 1000
1468 G13
Settling Time to 0.01% vs Output Step, VS = 5V
10 VS = 5V RL = 1k 8 AV = 1 AV = -1 OUTPUT STEP (V) 6 4 2 0 -2 -4 -6 -8 -10 400 600 700 500 SETTLING TIME (ns) 800
1468 G14
Settling Time to 150V vs Output Step
VS = 15V AV = -1 RF = RG = 2k CF = 8pF
AV = 1
AV = -1
600 800 400 SETTLING TIME (ns)
-5 300
0
200
600 800 400 SETTLING TIME (ns)
1000
1468 G15
Gain Bandwidth and Phase Margin vs Supply Voltage
98 96 GAIN BANDWIDTH (MHz) 94 92 90 88 GAIN BANDWIDTH 86 84 82 0 10 5 15 SUPPLY VOLTAGE (V) 20
1468 G17
Gain Bandwidth and Phase Margin vs Temperature
44 104 102 GAIN BANDWIDTH (MHz) 100 98 96 94 92 90 88 86 84 -55 -25 50 25 0 75 TEMPERATURE (C) 100 VS = 5V GAIN BANDWIDTH VS = 15V VS = 5V PHASE MARGIN 46 44 OUTPUT IMPEDANCE () VS = 15V 42 PHASE MARGIN (DEG) 40 38 36 34 32 30 28 26 125 10 100 42
Output Impedance vs Frequency
VS = 15V TA = 25C AV = 100 1 AV = 10 0.1 AV = 1
TA = 25C AV = -1 RF = RG = 5.1k CF = 5pF RL = 2k
PHASE MARGIN 40 38 36 34 32 30 28 PHASE MARGIN (DEG)
0.01
0.001 10k
100k
1M 10M FREQUENCY (Hz)
100M
1468 G19
1468 G18
1468fb
7
LT1468 TYPICAL PERFORMANCE CHARACTERISTICS
Gain and Phase vs Frequency
70 60 PHASE 50 GAIN (dB) 40 30 GAIN 20 10 0 TA = 25C AV = -1 RF = RG = 5.1k CF = 5pF RL = 2k 100k 15V -20 5V -40 -60 100M
1468 G16
Power Supply Rejection Ratio vs Frequency
100 80 160 POWER SUPPLY REJECTION RATIO (dB) 140 120 100 80 60 40 20 0 100 1k 10k 1M 100k FREQUENCY (Hz) 10M 100M
1468 G20
Common Mode Rejection Ratio vs Frequency
120 COMMON MODE REJECTION RATIO (dB) 100 80 60 40 20 0 100 VS = 15V TA = 25C
VS = 15V TA = 25C +PSRR -PSRR
15V 5V
60 PHASE (DEG) 40 20 0
-10 10k
1M 10M FREQUENCY (Hz)
1k
10k 100k 1M FREQUENCY (Hz)
10M
100M
1468 G21
Frequency Response vs Supply Voltage, AV = 1
5 4 3 2 GAIN (dB) GAIN (dB) 1 0 -1 -2 -3 -4 -5 100k 1M 10M FREQUENCY (Hz) 100M
1468 G22
Frequency Response vs Supply Voltage, AV = - 1
5 14 RF = RG = 2k 5V 15V GAIN (dB) 12 10 8 6 4 2 0 TA = 25C AV = -1 RL = 2k CF = 5pF 1M 10M FREQUENCY (Hz) 100M
1468 G23
Frequency Response vs Capacitive Load, AV = 1
VS = 15V TA = 25C AV = 1 NO RL 100pF 50pF 20pF 10pF
TA = 25C AV = 1 RL = 2k 5V 15V
4 3 2 1 0 -1 -2 -3 -4 RF = RG = 5.1k 5V 15V
-2 -4 -6 100k 1M 10M FREQUENCY (Hz) 100M
1468 G24
-5 100k
Frequency Response vs Capacitive Load, AV = -1
14 12 10 8 GAIN (dB) 6 4 2 0 -2 -4 -6 100k 1M 10M FREQUENCY (Hz) 100M
1468 G25
Slew Rate vs Supply Voltage
30 TA = 25C 28 AV = -1 RL = 2k 45 40 -SR 35 SLEW RATE (V/s)
Slew Rate vs Temperature
VS = 15V AV = -1 RL = 2k -SR 30 25 20 15 10 +SR
SLEW RATE (V/s)
VS = 15V TA = 25C AV = -1 RF = RG = 5.1k CF = 5pF NO RL 200pF
300pF
26 24 22 20 18 16 14 0 10 5 15 SUPPLY VOLTAGE (V) 20
1468 G26
+SR
100pF 50pF
5 -50 -25
0
75 50 25 TEMPERATURE (C)
100
125
1468 G27
1468fb
8
LT1468 TYPICAL PERFORMANCE CHARACTERISTICS
Total Harmonic Distortion + Noise vs Frequency
0.010 VS = 15V TA = 25C RL = 600 VO = 20VP-P NOISE BW = 80kHz -50 OUTPUT VOLTAGE SWING (VP-P) -60 5V THD + NOISE (dB) -70 -80 -90 15V
Total Harmonic Distortion + Noise vs Amplitude
30 25 20
Undistorted Output Swing vs Frequency, 15V
AV = 1
THD + NOISE (%)
0.001
AV = 10 AV = 1 MEASUREMENT LIMIT
AV = -1 15 10 5 0
-100 0.0001 20 100 1k FREQUENCY (Hz) 10k 20k
1468 G28
-110 0.01
TA = 25C AV = 10 RL = 600 f = 10kHz NOISE BW = 80kHz 0.1 1 OUTPUT SIGNAL (VRMS) 10
1468 G29
VS = 15V RL = 2k 1 10 100 FREQUENCY (kHz) 1000
1468 G30
Small-Signal Transient, AV = 1
Small-Signal Transient, AV = - 1
10 9 OUTPUT VOLTAGE SWING (VP-P) 8 7 6 5 4 3 2 1 0
Undistorted Output Swing vs Frequency, 5V
VS = 5V RL = 2k AV = 1 AV = -1
VS = 15V
1468 G31
VS = 15V
1468 G32
1
10 100 FREQUENCY (kHz)
1000
1468 G33
Large-Signal Transient, AV = 1
Large-Signal Transient, AV = - 1
100 TOTAL NOISE VOLTAGE (nV/Hz)
Total Noise vs Unmatched Source Resistance
VS = 15V TA = 25C f = 10kHz 10 TOTAL NOISE RESISTOR NOISE ONLY 1
RS
+ -
VS = 15V
1468 G34
VS = 15V
1468 G35
0.1 10 100 1k 10k SOURCE RESISTANCE, RS () 100k
1468 G36
1468fb
9
LT1468 APPLICATIONS INFORMATION
The LT1468 may be inserted directly into many operational amplifier applications improving both DC and AC performance, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT1468 is shown below.
Offset Nulling
V+ 3
contacts to the inputs can exceed the inherent drift of the amplifier. Air currents over device leads should be minimized, package leads should be short, and the two input leads should be as close together as possible and maintained at the same temperature. Make no connection to Pin 8. This pin is used for factory trim of the inverting input current.
+
LT1468
76 4
0.1F
2.2F
2
-
5 1 100k
0.1F
2.2F
The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole that can cause peaking or even oscillations. For feedback resistors greater than 2k, a feedback capacitor of the value: CF > (RG)(CIN/RF) should be used to cancel the input pole and optimize dynamic performance. For applications where the DC noise gain is one, and a large feedback resistor is used, CF should be greater than or equal to CIN. An example would be a DAC I-to-V converter as shown on the front page of this data sheet where the DAC can have many tens of pF of output capacitance. Another example would be a gain of -1 with 5k resistors; a 5pF to 10pF capacitor should be added across the feedback resistor. The frequency response in a gain of -1 is shown in the Typical Performance curves with 2k and 5.1k resistors with a 5pF feedback capacitor.
Nulling Input Capacitance
RF CF
V-
1468 AI01
Layout and Passive Components The LT1468 requires attention to detail in board layout in order to maximize DC and AC performance. For best AC results (for example fast settling time) use a ground plane, short lead lengths, and RF-quality bypass capacitors (0.01F to 0.1F) in parallel with low ESR bypass capacitors (1F to 10F tantalum). For best DC performance, use "star" grounding techniques, equalize input trace lengths and minimize leakage (i.e., 1.5G of leakage between an input and a 15V supply will generate 10nA--equal to the maximum IB- specification.) Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs. For inverting configurations tie the ring to ground, in noninverting connections tie the ring to the inverting input (note the input capacitance will increase which may require a compensating capacitor as discussed below.) Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects caused by temperature gradients across dissimilar metals at the
RG CIN VIN
-
LT1468 VOUT
+
1468 AI02
1468fb
10
LT1468 APPLICATIONS INFORMATION
Input Considerations Each input of the LT1468 is protected with a 100 series resistor and back-to-back diodes across the bases of the input devices. If the inputs can be pulled apart, the input current should be limited to less than 10mA with an external series resistor. Each input also has two ESD clamp diodes--one to each supply. If an input is driven above the supply, limit the current with an external resistor to less than 10mA. The LT1468 employs bias current cancellation at the inputs. The inverting input current is trimmed at zero common mode voltage to minimize errors in inverting applications such as I-to-V converters. The noninverting input current is not trimmed and has a wider variation and therefore a larger maximum value. As the input offset current can be greater than either input current, the use of balanced source resistance is NOT recommended as it actually degrades DC accuracy and also increases noise. The input bias currents vary with common mode voltage as shown in the Typical Performance Characteristics. The cancellation circuitry was not designed to track this common mode voltage because the settling time would have been adversely affected. The LT1468 inputs can be driven to the negative supply and to within 0.5V of the positive supply without phase reversal. As the input moves closer than 0.5V to the positive supply, the output reverses phase. Total Input Noise The curve of Total Noise vs Unmatched Source Resistance in the Typical Performance Characteristics shows that with source resistance below 1k, the voltage noise of the amplifier dominates. In the 1k to 20k region the increase in noise is due to the source resistance. Above 20k the input current noise component is larger than the resistor noise. Capacitive Loading The LT1468 drives capacitive loads of up to 100pF in unity gain and 300pF in a gain of -1. When there is a need to drive a larger capacitive load, a small series resistor should be inserted between the output and the load. In addition, a capacitor should be added between the output and the inverting input as shown in Driving Capacitive Loads. Settling Time The LT1468 is a single stage amplifier with an optimal thermal layout that leads to outstanding settling performance. Measuring settling, even at the 12-bit level is very challenging, and at the 16-bit level requires a great deal of subtlety and expertise. Fortunately, there are two excellent Linear Technology reference sources for settling measurements, Application Notes 47 and 74. Appendix B of AN47 is a vital primer on 12-bit settling measurements, and AN74 extends the state of the art while concentrating on settling time with a 16-bit current output DAC input.
Input Stage Protection
Driving Capacitive Loads
RF CF RO (1 + RF/RG)/(2CL5MHz) RF 10RO CF = (2RO/RF)CL RO LT1468 VOUT CL
1468 AI04
R1 100 +IN
Q1
Q2
R2 100 -IN
1468 AI03
RG
-
VIN
+
1468fb
11
LT1468 APPLICATIONS INFORMATION
The 150V settling curve in the Typical Performance Characteristics is measured using the Differential Amplifier method of AN74 followed by a clamped, nonsaturating gain of 100. The total gain of 500 allows a resolution of 100V/DIV with an oscilloscope setting of 0.05V/DIV The settling of the DAC I-to-V converter on the front page was measured using the exact methods of AN74. The optimum nulling of the DAC output capacitance requires 20pF across the 6k feedback resistor. The theoretical limit for 16-bit settling is 11.1 times this RC time constant or 1.33s. The actual settling time is 1.7s at the output of the LT1468. The LT1468 is the fastest Linear Technology amplifier in this application. The optional noise filter adds a slight delay of 100ns, but reduces the noise bandwidth to 1.6MHz which increases the output resolution for 16-bit accuracy. Distortion The LT1468 has outstanding distortion performance as shown in the Typical Performance curves of Total Harmonic Distortion + Noise vs Frequency and Amplitude. The high open-loop gain and inherently balanced architecture reduce errors to yield 16-bit accuracy to frequencies as high as 100kHz. An example of this performance is the Typical Application titled 100kHz Low Distortion Bandpass Filter. This circuit is useful for cleaning up the output of a high performance signal generator such as the B & K type 1051 or HP3326A. Another key application for LT1468 is buffering the input to a 16-bit A/D converter. In a gain of 1 or 2 this straightforward circuit provides uncorrupted AC and DC levels to the converter, while buffering the A/D input sampleand-hold circuit from high source impedance which can reduce the maximum sampling rate. The front page graph shows better than 16-bit distortion for a gain of 2 with a 10VP-P output.
SIMPLIFIED SCHEMATIC
V+ I1 I2 Q8 +IN Q1 Q2 -IN Q5 Q6 Q7 Q3 Q4 BIAS C Q11 I5 Q10 Q9 OUT
I3 V-
I4
I6
1468 SS
1468fb
12
LT1468 PACKAGE DESCRIPTION
DD Package 8-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
0.70 0.05
3.5 0.05 1.65 0.05 2.10 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.125 TYP 5 0.40 8 0.10
3.00 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6)
1.65 0.10 (2 SIDES)
(DD8) DFN 0509 REV C
0.200 REF
0.75 0.05
0.25
4 0.05 2.38 0.10
1 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD
NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE
1468fb
13
LT1468 PACKAGE DESCRIPTION
N8 Package 8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.400* (10.160) MAX 8 7 6 5
.255 .015* (6.477 0.381)
1 .300 - .325 (7.620 - 8.255)
2
3
4 .130 .005 (3.302 0.127)
.045 - .065 (1.143 - 1.651)
.008 - .015 (0.203 - 0.381) +.035 .325 -.015
.065 (1.651) TYP .120 (3.048) .020 MIN (0.508) MIN .018 .003 (0.457 0.076)
N8 1002
(
8.255
+0.889 -0.381
)
.100 (2.54) BSC
INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
NOTE: 1. DIMENSIONS ARE
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
.189 - .197 (4.801 - 5.004) NOTE 3 8 7 6 5
.045 .005 .050 BSC
.245 MIN
.160 .005 .228 - .244 (5.791 - 6.197)
.150 - .157 (3.810 - 3.988) NOTE 3
.030 .005 TYP
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
.010 - .020 x 45 (0.254 - 0.508)
.008 - .010 (0.203 - 0.254) 0- 8 TYP
.053 - .069 (1.346 - 1.752)
.004 - .010 (0.101 - 0.254)
.016 - .050 (0.406 - 1.270)
NOTE: 1. DIMENSIONS IN
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.014 - .019 (0.355 - 0.483) TYP
.050 (1.270) BSC
SO8 0303
1468fb
14
LT1468 REVISION HISTORY
REV B DATE 10/09 DESCRIPTION Change to Both Packages in Pin Configuration
(Revision history begins at Rev B)
PAGE NUMBER 2
1468fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1468 TYPICAL APPLICATIONS
Instrumentation Amplifier
R5 1.1k R2 5k R1 50k C1 10pF R4 50k C2 2pF 2k 10pF
16-Bit ADC Buffer
2k
-
LT1468
200 LTC1605 1000pF 33.2k CAP 2.2F
16 BITS
-
LT1468
R3 5k
VIN
+
-
LT1468 VOUT
1468 TA03
1468 TA04
-
VIN
+ +
+
GAIN = [R4/R3][1 + (1/2)(R2/R1 + R3/R4) + (R2 + R3)/R5] = 102 TRIM R5 FOR GAIN TRIM R1 FOR COMMON MODE REJECTION BW = 480kHz
100kHz Low Distortion Bandpass Filter
1000pF
22.1k 11k VIN 121 1000pF
-
LT1468 VOUT RL
+
100kHz Distortion SIGNAL LEVEL 1VRMS 2VRMS 3.5VRMS 1VRMS 2VRMS 3.5VRMS
RL 1M 1M 1M 2k 2k 2k
2ND HARMONIC -106dB -105dB -106dB -103dB -99dB -96.5dB
3RD HARMONIC -103dB -105dB -104dB -103dB -103dB -102dB
1468 TA05
fO = 100kHz Q=7 AV = -1
RELATED PARTS
PART NUMBER LT1167 LTC1595/LTC1596 LTC1597 LTC1604 LTC1605 LT1469 LT1800 LT6220 LT1722 LTC6244HV DESCRIPTION Precision Instrumentation Amplifier 16-Bit Serial Multiplying IOUT DACs 16-Bit Parallel Multiplying IOUT DAC 16-Bit, 333ksps Sampling ADC Single 5V, 16-Bit, 100ksps Sampling ADC Dual 90MHz 16-Bit Accurate Op Amp COMMENTS Single Resistor Gain Set, 0.04% Max Gain Error, 10ppm Max Gain Nonlinearity 1LSB Max INL/DNL, Low Glitch, DAC8043 16-Bit Upgrade 1LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors 2.5V Input, SINAD = 90dB, THD = -100dB Low Power, 10V Inputs, Parallel/Byte Interface Dual Version of LT1468
80MHz, 25V/s Low Power Rail-to-Rail Precision Op Amp VS 5V, ICC = 1.6mA, VOS 350V 60MHz, 20V/s Low Power Rail-to-Rail Precision Op Amp VS 5V, ICC = 0.9mA, VOS 350V 200MHz, 70V/s Low Noise Precision Op Amp Dual 50MHz, Low Noise, Precision CMOS Op Amp VS 5V, en = 3.8nV/Hz, -85dBc at 1MHz VS 5V, VOS 100V, IB 75pA
1468fb
16 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 1009 REV B * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 1998

▲Up To Search▲

Price & Availability of LT146809

	To Download LT146809 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .